Overview

Company: Qualcomm Canada ULC Job Area: Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path. Minimum Qualifications:• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. ORMaster's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience. ORPhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. Qualcomm is expanding its team in connectivity networking products engineering Team. We are looking for experienced SoC RTL design engineers to contribute to our next generation connectivity networking products. This is an incredible opportunity to be part of the AI revolution and contribute to the complete semiconductor development cycle, from concept to product. The ideal candidate will have a strong and extensive background in RTL design across multiple projects. As an experienced RTL Design Engineer, you will work in SoC design and SOC-Subsystem design. You will be responsible for microarchitecture/RTL coding of the SOC/subsystems and create microarchitecture documents. You will work with verification teams on achieving the code & functional coverage. You will work with Physical design team to meet area, power and performance goals. You will support physical design teams, verification teams, software teams and FPGA teams to ensure high quality SoC and ensure successful tapeout. New Position.Why Join Us?Work on cutting-edge SoC designs in advanced process nodes.Products purpose-built for AI datacenter scale out and scale up connectivityWork in a high-impact, fast-paced environment.Competitive compensation and career growth opportunities.Work alongside some of the best minds in the semiconductor industry.What You'll DoMicro architect and RTL Design of SoC SubSystem/IP blocksWill develop UPF and run CLP checksWill be responsible for RTL quality checks - Lint/CDC/LECCreate appropriate documentation for hardware blocksResponsible for analyse / debug / fixing issues reported by verification teamWill develop the synthesis constraints for the blocks / subsystemWork with SOC Architect/Leads to integrate the design, review/sign-off verification plan, DFT and PD implementationWhat You'll NeedStrong background with multi-year and multi-project experience in RTL SoC Design (Verilog/VHDL), and ASIC/FPGA debug methodologiesExperience in SerDes PHY, DSP, and Analog mixed signal is desirableKnowledge in Ethernet and PCIe standards is desirableTest Plans & Verification: Proficient in reviewing high-level test plans and coverage metrics.Synthesis & Formal Verification: Expertise in Design Compiler Synthesis and formal verification using LEC.Timing Closure: Comprehensive understanding of timing closure.Post-Silicon Debug: Experience in post-silicon bring-up and debugging.Communication & Leadership: Team player with strong communication skills to ensure effective program execution.It Would Be Amazing If You HadArchitecture: Ability to develop architecture and micro-architecture based on specifications.Bus Protocols & Peripherals: Knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc.Memory Controllers & Microprocessors: Experience with memory controller desi