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Principal Hardware Systems Engineer

Date Posted: Oct 12, 2026
Yearly: USD - USD

Job Detail

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    Location Santa Clara, Baja California, United States of America
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    Job Type: Permanent
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    Experience:
  • male
    Gender: No Preference
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    Apply Before: Jan 10, 2027

Job Description

Overview

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work-work that changes the world-is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE As a Principal Hardware Systems Engineer within Everpure's EXA Hardware Engineering organization, you will serve as a primary technical authority driving the architectural vision, end-to-end design, and system-level validation of our next-generation enterprise and cloud-scale storage platforms. In this principal-level role, you will define the technology roadmap that bridges deep silicon/board-level hardware innovation with complex, multi-node cloud execution. You will establish design patterns, set high-speed and power/thermal benchmarks, and lead technical strategy across internal platform software teams, cross-functional executives, and global OEM/ODM/JDM partners. By defining next-generation server architectures, rack-scale power/thermal strategies, and zero-downtime resilience models, you will ensure EverPure maintains its industry-leading edge in storage performance and platform reliability. WHAT YOU'LL DO Architectural Leadership & Platform Strategy: Define and own the end-to-end multi-generational hardware roadmap for enterprise storage platforms. Drive architectural trade-off decisions across compute (x86/ARM), memory subsystems, DPUs, high-speed fabrics (PCIe Gen 5/6, CXL), and media technologies to maximize storage density, performance per watt, and TCO. JDM/ODM Governance & System Design: Lead system-level HW design reviews (schematics, layout, power tree design, thermal topology) across global OEM/ODM/JDM partners. Establish technical standards, engineering requirements documents (ERDs), and design guidelines to ensure flawless vendor execution. Validation Strategy & Framework Architecture: Architect overall hardware quality frameworks, comprehensive validation strategies, and advanced diagnostic models spanning parametric, functional, electrical, and full-stack software/firmware integration. Establish automated telemetry, stress-testing paradigms (e.g., FIO, SPEC, custom IO engines), and gating criteria for tier-0 production releases. Escalated Debug & Failure Analysis Authority: Serve as the final technical escalation point for complex, systemic hardware, signal integrity, and storage-node failures. Lead dynamic task forces across hardware, firmware, software, and silicon vendors to drive root-cause analysis (RCA) and long-term corrective action (CA) for high-impact edge cases. Test Automation & Tooling Infrastructure: Drive the architecture and adoption of automated test frameworks (Python/Bash) for hardware validation, L10 device-level, and L11 rack-level platform stability, continuously raising the bar for test coverage and cycle time reduction. Cross-Functional & Ecosystem Influence: Partner closely with executive engineering leadership, software architects, platform design, and network infrastructure teams to ensure tight HW/FW/SW co-design. Champion systemic improvements in reliability, availability, and serviceability (RAS). WHAT YOU BRING Mastery of Enterprise Server & Storage Systems: Deep architectural expertise in high-density x86 enterprise server systems, rack-scale power delivery topologies (power-tree modeling, transient analysis), dynamic thermal management, high-performance storage protocols (NVMe-oF, CXL), and multi-node rack architectures. Deep Hands-On Bring-Up & Diagnostics: Extensive experience executing complex system bring-ups, high-speed signal integrity validation (PCIe Gen 5/6, high-frequency buses), and deep-dive hardware failure an

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Company Overview

Santa Clara, Baja California, United States of America

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