Job Description: THE ROLE: Experienced Emulation Engineers with strong expertise in Palladium/ZeBu hardware emulation to support SoC/IP verification and validation activities. Key Responsibilities: Develop and maintain emulation environments using Palladium/ZeBu platforms Port RTL/UVM testbenches from simulation to emulation Debug SoC/IP level issues in emulation and provide root-cause analysis Optimize performance and compile time for large SoC designs Integrate transactors, BFMs, and acceleration models Work closely with DV, RTL, and software teams for bring-up and validation Develop/employ hybrid verification (simulation + emulation) flows Support pre-silicon software validation and boot flows Create scripts for build, run, and regression automationRequired Skills: 3+ years in SoC/IP verification with emulation experience Strong hands-on experience with palladium/ZeBu emulation platforms Good knowledge of SystemVerilog and UVM Experience in simulation-to-emulation bring-up Familiarity with SCE-MI / transactor-based acceleration Strong debugging skills across RTL, testbench, and firmware Knowledge of PCIe/AXI/DDR or similar standard protocols Experience with Linux bring-up on emulation is a plus
Not specified in the original listing.
Not specified in the original listing.
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